Integrated circuit devices typically comprise various on-die signal and data interconnects with which integrated circuit device components are able to transmit and receive electrical signals and data to and from other on-die components, such as other functional units of the same integrated circuit device. For the transmission of signals over such on-die interconnects, integrated circuit devices typically comprise line receivers and drivers arranged to receive and transmit signals over the on-die interconnects.
In order to ensure correct data transfer across an on-die interconnect, the influence of the interconnect's parasitic characteristics on the signal quality must be minimised to an acceptable (low) level. One known method widely used in VLSI (Very Large Scale Integration) processes for reducing the influence of parasitic characteristics of on-die interconnects comprises dividing an interconnect line into a plurality of short sections by inserting multiple repeaters along the interconnect. However, a problem with this method is that these repeaters are associated with excessive power consumption, signal propagation delay and occupied die area. Furthermore, these problems are amplified with increases in chip scale integration and signal rate.
Another known technique for minimising the influence of parasitic characteristics of on die interconnects comprises strict impedance matching between the on-die interconnect driver and interconnect line. Accurate and consistent impedance matching between on-die line drivers and their corresponding on-die interconnects for all dies of a particular product is not practically possible during the design stage due to significant production process variations and model limitations. Future variations of the ambient temperature and operating voltage aggravate the situation. If such mismatching of impedances is not taken into consideration in the design of integrated circuit chip, the integrity of transmitted signals may be jeopardized, and chip reliability compromised. Accordingly, it is necessary for integrated circuit systems to be designed to be tolerant of a degree of line driver/interconnect impedance mismatching. However, such tolerance to line driver/interconnect impedance mismatching typically cannot be achieved while required high system performance is preserved due to an inevitable degradation of the operating speed of the system, and increased power consumption.
Significantly, modern integrated circuit devices are required to provide increasingly high performance, whilst concurrently they are required to meet increasingly stringent power consumption and thermal energy dissipation requirements.